基于工艺参数扰动的随机互连线时延分析
李鑫[1] Janet M.Wang[2] 唐卫清[3] 吴慧中[1]
[1]南京理工大学计算机科学与技术学院,南京210094 [2]亚利桑那大学电子工程系,亚利桑那州AZ8742,美国 [3]中国科学院计算技术研究所,北京100080
摘 要:
考虑工艺参数扰动对互连电路传输性能的影响,建立了基于工艺扰动的互连线随机模型.通过改进的去耦算法对随机互连线元进行去耦,结合随机伽辽金方法(SGM)和多项式混沌展开(PCE)进行互连分析,进而利用复逼近及二分法给出工艺参数扰动下互连时延的有限维表达式.仿真实验结果不仅与SPICE仿真吻合得较好,相较于SPICE蒙特卡洛仿真还具有更高的计算效率.[著者文摘]
文章出处:
《半导体学报》-2008年29卷2期 -304-309页
栏目信息:
分 类 号:
文献标识码:
A
文章编号:
0253-4177(2008)02-0304-06
Stochastic Analysis of Interconnect Delay in the Presence of Process Variations
Li Xin, Janet M. Wang, Tang Weiqing, Wu Huizhong (1 Department of Computer Science and Technology, Nanjing University of Science and Technology, Nanjing 210094, China;2 Department of Electrical and Computer Engineering, University of Arizona, Arizona AZ8742, USA;3 Institute of ComputingTechnology, Chinese AcademyofSciences, Beijing 100080, China)
Abstract:
Process variations can reduce the accuracy in estimation of interconnect performance. This work presents a process variation based stochastic model and proposes an effective analytical method to estimate interconnect delay. The technique decouples the stochastic interconnect segments by an improved decoupling method. Combined with a polynomial chaos expression (PCE), this paper applies the stochastic Galerkin method (SGM) to analyze the system response. A finite representation of interconnect delay is then obtained with the complex approximation method and the bisection method. Results from the analysis match well with those from SPICE. Moreover, the method shows good computational efficiency, as the running time is much less than the SPICE simulation's.[著者文摘]
Key words:
coupled interconnects; process variations; stochastic modeling; delay estimation; stochastic Galerkin method; polynomial chaos expression

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